Switching-type power-supply apparatuses and motor-controlling apparatuses have an advantage of losing less electric power than series-regulator type apparatuses. The switching-type apparatuses, however, have a drawback that their switching actions produce switching noises, which may affect adversely other electronic devices and apparatuses. Specifically, there is a case where a power-supply apparatus of switching type is situated near an electronic device, for instance, an audio device such as a radio receiver that emits voices, music, or melodies. In this case, the switching noises produced by the power-supply apparatus are sometimes superposed on the voices, the music, or the melodies, resulting in deterioration in the quality of the sound that the audio device produces.
Conventional techniques have been dealing with this problem attributable to switching noises by, for example, setting the switching frequency at a value not overlapping the radio frequency or at a value outside the audible frequency range as well as providing a built-in component for suppressing noises in the power-supply apparatus or motor-controlling apparatus. The electronic devices of recent years, however, use signals of various frequency ranges, and therefore it is practically difficult to set the switching frequency at a value that does not interfere with any of the signals used by the other electronic devices in use. To address this, techniques have been recently proposed which reduces the noise level of a particular frequency by spreading the frequency spectrum of switching noise in such a way as to variously change the cycle of a driving pulse for driving a switching element, or the time of the rising edge of the driving pulse, as described in Patent Documents 1 and 2.
FIG. 11 illustrates an exemplary configuration of a power-supply apparatus with a built-in switching regulator to keep the noise level of a particular frequency low by spreading the frequency spectrum of the switching noise.
In FIG. 11, a detector is denoted by 1, and a switching regulator 2 is provided on an output side of the detector 1. A driver 3 is situated on an output side of the switching regulator 2. A step-down DC/DC converter 5 is provided between the driver 3 and a load 4. The step-down DC/DC converter 5 includes a switching transistor Q1 and a choke coil L1 which are connected in series between the load 4 and a power-supply line Vcc, a rectifying transistor Q2 and a smoothing capacitor C1. The rectifying transistor Q2 is connected between one end of the choke coil L1 and the ground. The smoothing capacitor C1 is connected between another end of the choke coil L1 and the ground.
In the power-supply apparatus shown in FIG. 11, the detector 1, the switching regulator 2, and the driver 3 are provided to operate the step-down DC/DC converter 5. The detector 1 operates so as to detect the output voltage supplied from the step-down DC/DC converter 5 to the load 4, and to supply the switching regulator 2 with a feedback signal corresponding to the detected output voltage. The switching regulator 2 operates so as to generate a pulse signal with an on-duty cycle, a duty ratio (hereinafter, simply referred to as “on-duty cycle”) corresponding to the inputted feedback signal. The driver 3 operates so as to turn on or off the switching transistor Q1 and the rectifying transistor Q2 depending on the pulse signal.
The switching regulator 2 shown in FIG. 11 will be described in more detail. The switching regulator 2 internally includes pulse-width-modulation processing unit (PWM) 2a and pulse-cycle-manipulation processing unit 2b. The pulse-width-modulation processing unit (PWM) 2a mentioned here is a processing unit for setting the on-duty cycle of the pulse signal depending on the signal supplied by the detector 1. On the other hand, the pulse-cycle-manipulation processing unit 2b is a processing unit for manipulating cycles of pulse waveforms in accordance with a predetermined waveform pattern in a way that consecutive pulse waveforms of a predetermined number include two or more pulses having different cycles. The pulse signal thus generated through the pulse-width-modulation processing unit (PWM) 2a and the pulse-cycle-manipulation processing unit 2b has waveforms shown in FIGS. 12A and 12B, for example.
The pulse signal shown in FIG. 12A includes a combination of three pulses T1, T2, and T3 in a series of pulse-signal cycles T4. A high-value period of each of the three pulses T1, T2, and T3 has a length depending on the feedback signal supplied from the detector 1 and on the cycle of the corresponding pulse T1, T2, or T3. In FIG. 12A, the high-value periods of the pulses T1, T2, and T3 are set at such lengths that all the three pulses T1, T2, and T3 have the same on-duty cycle, for instance, 50(%). Each cycle of the pulses T1, T2, and T3 is manipulated in accordance with a predetermined waveform pattern. Specifically, the pulse T1 is set shorter than the pulse T2, and the pulse T3 is set to have the same length as the pulse T2.
The pulse signal shown in FIG. 12B also includes a combination of three pulses T6, T7, and T8 in a series of pulse-signal cycles T5. As in the case of the pulses T1, T2, and T3 shown in FIG. 12A, a high-value period of each of the three pulses T6, T7, and T8 has a length depending on the signal supplied from the detector 1 and on the cycle of the corresponding pulse T6, T7, or T8. In FIG. 12B, the high-value periods of the pulses T6, T7, and T8 are set at such lengths that all the three pulses T6, T7, and T8 have the same on-duty cycle, for instance, 50(%). Each cycle of the pulses T6, T7 and T8 is manipulated, however, in accordance with a waveform pattern different from the one shown in FIG. 12A. Specifically, the cycle of the pulse T6 is set shorter than that of the pulse T7, and the cycle of the pulse T8 is also set shorter than that of the pulse T7. Consequently, the cycles of respective series of pulse signals generated in accordance with respective patterns, that is, the pattern cycles T4 and T5 are set to have lengths different from each other on a waveform pattern basis.
In the pulse signal shown in FIG. 12A, when the level of each of the pulses T1, T2, and T3 is at a high value, the switching element, that is, the switching transistor Q1 shown in FIG. 11 is turned on and turned off when the level is at a low value.
In a case where the switching transistor Q1 is operated by using a pulse signal with the waveform pattern, i.e., the series of pulse signal waveform shown in FIG. 12A, the cycle of the operation of the switching transistor Q1 varies because the waveform pattern includes pulses of different cycles, e.g., the pulses T1 and T2 shown in FIG. 12A. To put it differently, the spectrum of the switching frequency is spread. Along with this, the frequency spectrum of the switching noise is also spread, so that the noise level of a particular frequency is reduced.
The use of only the pulse signal with the waveform pattern shown in FIG. 12A to drive the switching transistor Q1, however, may increase a noise level of the switching noise of a particular frequency for the following reason: for a particular on-duty cycle, the time interval between the turn-off times of two sequent pulses, that is, falling down portions of the pulses is equal to one to an integer of the pattern cycle T4. To solve this problem, the waveform pattern is changed from one to another depending on the on-duty cycle. Specifically, the waveform pattern shown in FIG. 12A is changed to the one shown in FIG. 12B. Since the pattern cycles T4 and T5 have lengths different from each other, the noise level of the switching noise at a particular frequency can be prevented from becoming higher for a particular on-duty cycle.
Besides the changing of the waveform patterns, there is another way to prevent the level of the noise of a particular frequency from becoming high when the interval of the turn-off times of sequent pulse waveforms shown in FIG. 12A is equal to one to an integer of the pattern cycle T4. As FIGS. 13(a) and 13(b) show, different shifting times φ0 to φ2 may be added to the turn-on times of the respective pulse waveforms T9 to T16 in the pattern cycle T17. Note that the waveform pattern shown in FIG. 13(a) is the one before the shifting times φ0 to φ2 are added. The processing unit for adding shifting times of plural kinds to the turn-on times of the pulses will be hereinafter referred to as a pulse-position-modulation processing unit (Pulse Position Modulation).
The waveform pattern shown in FIG. 13(b) includes two different kinds of pulse waveform and three different kinds of shifting time, that is, shifting times φ0, φ1 and φ2. The occurrence frequency of the same combination of a particular pulse waveform and a particular shifting time is kept low, so that the frequency spectrum of the switching noise is spread effectively. To obtain a pulse signal of such waveform pattern, as shown in FIG. 14, the pulse-position-modulation processing unit (PPM) 2c is driven after the pulse-cycle-manipulation processing unit 2b is driven. For example, when the pulse-position-modulation processing unit (PPM) 2c is configured together with the pulse-cycle-manipulation processing unit 2b, as shown in FIG. 14, the constituent parts necessary for the pulse-position-modulation processing unit (PPM) 2c are provided in the switching regulator 2. Instead, when a delay circuit or the like is used in place of the pulse-position-modulation processing unit (PPM) 2c to secure the same function as that of the pulse-position-modulation processing unit (PPM) 2c, the delay circuit or the like may also be situated on the output side of the switching regulator 2, at the previous stage of the driver 3, or in the driver 3.
The pulse-width-modulation processing unit (PWM) 2a, the pulse-cycle-manipulation processing unit 2b, and the pulse-position-modulation processing unit (PPM) 2c are formed of elements such as microcomputers that have computing function. FIG. 15 shows a specific hardware configuration of the switching regulator 2 in this case. The switching regulator 2 shown in FIG. 15 internally includes an A/D converter 2A, a computing unit 2B, and a memory 2C.
The memory 2C in the switching regulator 2 shown in FIG. 15 stores in advance data necessary for the formation of waveform patterns and data for setting the shifting times. The A/D converter 2A converts an analog signal supplied from the detector 1 into a digital signal, and outputs the digital signal. In this state, the computing unit 2B loads the data stored in the memory 2C as appropriate, and generates a pulse signal with a predetermined waveform pattern in accordance with the loaded data. At the same time, the computing unit 2B performs an operation of acquiring the digital signal generated by the A/D converter 2A as appropriate, and making the high-value period of each pulse to be the length corresponding to the digital signal. As a result of the operations of the units 2A to 2C, a pulse signal with a waveform pattern shown in FIG. 13 is inputted from the switching regulator 2 into the driver 3.
The pulse-cycle-manipulation processing unit 2b shown in FIG. 14 manipulates the cycles of the pulse waveforms in accordance with a predetermined pattern so that the sequent pulse waveforms of a predetermined number include pulse waveforms of different cycles. An objective of the pulse-cycle-manipulation processing unit 2b is to vary the operational cycle of the switching element, and thus spread the frequency spectrums of the switching frequency and the switching noise. This objective can be achieved pulse waveforms of different cycles are included in the sequent pulse waveforms of a predetermined number. Thus, the cycles of the pulse waveforms may be manipulated at random, that is, not according to the waveform pattern. Processing unit for manipulating the cycles of pulse waveforms at random is referred to as an asynchronous modulation processing unit. Non-patent document 1 has a research report on the study on the asynchronous modulation processing unit (ASM).
Regarding the series of pulse-signal cycles T17 shown in FIGS. 13(a) and 13(b), the pulse-position-modulation processing unit (PPM) 2c is used instead of changing waveform patterns. In a case where only the pulse-position-modulation processing unit (PPM) 2c is used immediately after the pulse-width-modulation processing unit (PWM) 2a, both the frequency spectrums of the switching frequency and the switching noise are spread as in the case of using the pulse-cycle-manipulation processing unit 2b or the asynchronous-modulation processing unit (ASM). The pulse signal which has the waveform pattern shown in FIG. 13(b) and which is formed by both the pulse-cycle-manipulation processing unit 2b and the pulse-position-modulation processing unit (PPM) 2c can spread effectively the frequency spectrum of the switching noise by taking advantage of the synergy effect of the operations of the pulse-cycle-manipulation processing unit 2b and the pulse-position-modulation processing unit (PPM) 2c. However, if the pulse-position-modulation processing means (PPM) 2c is simply used, a problem occurs that the on-duty cycles are limited by the shifting times as described below.
In a waveform chart shown in FIG. 13(b), for instance, the longest one among the shifting times φ0 to φ2 added to the turn-on times for the pulses T9 to T16 is the shifting time φ2. To spread sufficiently the frequency spectrum of the switching noise and thus to reduce the noise level of a particular frequency, it is preferable to elongate the shifting time φ2 as well as to increase the number of the kinds of shifting times to be set. Incidentally, when the shifting time φ2 is set at half a time length of the pulse T9, the on-duty cycle of the pulse signal at this time must be 50(%) or lower. If the on-duty cycle exceeds 50(%), the high-value period of the preceding pulse T9 and that of the next pulse T10 partially overlap, and thus the on-duty cycles of the pulses T9 and T10 as well as the on-duty cycles of the pattern cycle T17 may deviate from their respective proper values.
Accordingly, if the pulse-position-modulation processing unit (PPM) 2c is used, the maximum value of the on-duty cycle and the maximum value of the shifting times φ0 to φ2 have the trade-off relationship. As the shifting times φ0 to φ2 are set longer, the on-duty cycle has to be set shorter, accordingly.
Under such circumstances, an objective of the present invention is to provide a switching regulator capable of using a pulse-position-modulation processing unit (PPM) 2c without having limitation on the on-duty cycle by shifting times φ0 to φ2. Specifically, the switching regulator to be provided by the present invention may generate a pulse signal with an on-duty cycle of 50(%) or higher even when the longest shifting time is set at half a cycle of the pulse waveform.    Patent Document 1: Japanese Patent Laid-Open No. 2006-288103    Patent Document 2: Japanese Patent Laid-Open No. 2006-288104    Non-Patent Document 1: Tetsuro TANAKA and two others, “On the Low-Frequency Output-Noise of a DC-to-DC Converter with Random-Switching Control,” The Institute of Electronics, Information and Communication Engineers Transactions B September, 2000, Vol. J38-B, No. 9, pp. 1335-1341.